Actel

Actel IGLOO Low Power FPGAs
 
The ultra-low-power programmable solution

The Actel IGLOO low-power FPGA family of reprogrammable, full-featured flash FPGAs is designed to meet the demanding power, area, and cost requirements of today's portable electronics. Based on the Actel nonvolatile flash technology and single-chip ProASIC3 FPGA architecture, the 1.2 V to 1.5 V operating voltage family offers the industry's lowest power consumption—as low as 5 µW. The IGLOO family supports up to 3 million system gates with up to 504 kbits of true dual-port SRAM, up to 6 embedded PLLs, and up to 620 user I/Os.

Low-power applications that require 32-bit processing can use the ARM® Cortex™-M1 processor without license fee or royalties in M1 IGLOO devices. Developed specifically for implementation in FPGAs, Cortex-M1 offers an optimal balance between performance and size to minimize power consumption.

The IGLOO family includes:

  • IGLOO
  • IGLOOe
  • M1 IGLOO
  • M1 IGLOOe

Product Features

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Key Features
  • Ultra-low power in Flash*Freeze mode
  • Low power active capability
  • Small footprint packages
  • As low as $0.99 unit cost
  • Reprogrammable flash technology
  • 1.2 V to 1.5 V operation
  • High-capacity, advanced I/Os
  • Clock conditioning circuits (CCCs) and PLLs
  • Embedded SRAM and nonvolatile memory (NVM)
  • In-system programming (ISP) and security
Product Table
IGLOO Devices AGL015 AGL030 AGL060 AGL125 AGL250 AGL400 AGL600 AGL1000 AGLE600 AGLE3000
Cortex-M1 Devices         M1AGL250   M1AGL600 M1AGL1000   M1AGLE3000
System Gates 15,000 30,000 60,000 125,000 250,000 400,000 600,000 1,000,000 600,000 3,000,000
Typical Equivalent Macrocells 128 256 512 1,024 2,048 — — — — —
VersaTiles
(D-Flip-Flops) 		384 768 1,536 3,072 6,144 9,216 13,824 24,576 13,824 75,264
Quiescent Current (typical)
in Flash*Freeze Mode (µW) 		5 5 10 16 24 32 36 53 49 137
RAM kbits
(1,024 bits) 		— — 18 36 36 54 108 144 108 504
4,608-Bit Blocks — — 4 8 8 12 24 32 24 112
FlashROM Bits 1,024 1,024 1,024 1,024 1,024 1,024 1,024 1,024 1,024 1,024
Secure (AES) ISP1 — — Yes Yes Yes Yes Yes Yes Yes Yes
Integrated PLLs
in CCCs2 		— — 1 1 1 1 1 1 6 6
VersaNet Globals3 6 6 18 18 18 18 18 18 18 18
I/O Standards Std.,
Hot-Swap 		Std.,
Hot-Swap 		Std.+ Std.+ Std.+/
LVDS 		Std.+/
LVDS 		Std.+/
LVDS 		Std.+/
LVDS 		Pro Pro
I/O Banks (+JTAG) 2 2 2 2 4 4 4 4 8 8
Maximum User I/Os 49 81 96 133 143 194 235 300 270 620
Speed Grades Std. Std. Std. Std. Std. Std. Std. Std. Std. Std.
Temperature Grades C, I C, I C, I C, I C, I C, I C, I C, I C, I C, I
Single-Ended I/Os / Differential I/O Pairs
QN48 (6 x 6 mm)   34                
QN68 (8 x 8 mm) 49 49                
UC81 (4 x 4 mm)   66                
CS81 (5 x 5 mm)   66                
CS121 (6 x 6 mm)     96              
VQ100 (14 x 14 mm)   77 71 71 68/13          
QN132 (8 x 8 mm)   81 80 84 87/194,5          
CS196 (8 x 8 mm)       133 143/35 143/35        
FG144 (13 x 13 mm)     965 97 97/24 97/25 97/25 97/25    
FG256 (17 x 17 mm)           178/38 177/43 177/44 165/79  
CS281 (10 x 10 mm)             215/53 215/53    
FG484 (23 x 23 mm)           194/38 235/60 300/74 270/135 341/168
FG896 (31 x 31 mm)                   620/310
Notes:
  1. AES is not available for Cortex-M1 IGLOO devices.
  2. AGL060 in CS121 does not support the PLL.
  3. Six chip (main) and twelve quadrant global networks are available for AGL060 and above.
  4. The M1AGL250 device does not support this package.
  5. Device/package support TBD.

IGLOO Family Resources

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